Xaoc Devices Gera

BINARY PRODUCT COMMANDER
Model of 1989

Gera is a component of the Leibniz subsystem that allows masking individual bits of the digital data by the use of logical AND operation. It features 8 individual gate inputs that affect the individual bits of data, as well as 8 illuminated tact switches for manual inverting of each control input. When connected to Drezno that is processing a waveform or voltage, masking of individual bits yields various forms of quantization. However, Gera can function on its own. The AND operation is a basic building block for sequence automation, chaos and rhythm generation, and various computer-like modular patches.
Bit processing logic in Gera is hardware based, hence there is virtually no latency, and the binary signals may change at extreme rates.

Main features:
– logical AND operation on Leibniz data
– masking of individual bits controlled manually and by gate signals
– visual indication by illuminated buttons
– 6HP
– 30 mm depth (including ribbon cable brackets)
– +12V: +45mA / -12V: 0mA / +5V: 0mA